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Multiple string matching has a wide range of applications such as network intrusion detection systems, spam filters, information retrieval systems, and bioinformatics. To accelerate multiple string matching, many hardware approaches are proposed to accelerate string matching. Among the hardware approaches, memory architectures have been widely adopted because of their flexibility and scalability....
The Prognostic and Health Management (PHM) technology has been widely used as means of improvement for reliability, safety and availability of new generation weapons and commercial products, achieving autonomic logistics. In avionics system, European countries and the USA have been promoting the development, maturing of PHM critical technologies and their applications in military and commercial aircrafts...
In this study, an image segmentation algorithm for processing Next-Generation Sequencing (NGS) fluorescence data is proposed. In NGS applications, fluorescent spots are randomly distributed, the number of spots is large, and the sizes of these spots are small. All the characteristics make the conventional segmentation algorithm not as efficient. To speed up the segmentation process, we propose a hardware-compatible...
Next-generation sequencing (NGS) has been widely applied to biological and medical researches for its efficient production of DNA short reads nowadays. Among various applications, de novo sequence assembly is a technique using NGS short reads to obtain a whole genome with no reference. To make assembly results accurate, it is a common practice to filter out low-quality data at the early stage of the...
In this paper, we propose a hardware compatible queue-based image segmentation algorithm for refining initial depth maps obtained from light field cameras. In the algorithm, an array is created to record the ranges of positions and intensities of possible segments, which make following segment merging steps much more efficient. An ASIC chip based on the proposed algorithm with a plane fitting calculator...
Organizations providing large scale software and hardware maintenance support services typically capture detailed metrics of each service request (SR) for a customer. Examples of such metrics include the time taken to resolve the problem, success of the resolution, escalations across levels of support, field engineer site visit statistics, and parts replacement data -- the latter two for hardware...
This paper presented a pan-tilt control system based on ARM11 and embedded system of Linux, introduced the hardware and software design of pan-tilt controller and how it specifically worked. It mainly included the design of circuit, the design of device drivers of embedded Linux system, and the communication protocol's implementation of the pan-tilt serial interface. The system integrated the pan-tilt...
Hardware Software partitioning is one of the most significant part of Hardware Software co-design of embedded systems, which is directly related to performance and cost. A lot of works have been done such as the simulated annealing algorithm, greedy algorithm and evaluation algorithm. In this paper, a new hardware software partitioning method based on Immune Algorithm was introduced. The model of...
With the development of embedded system and microelectronics technology, the hardware/software co-design methodology of SoC has taken an important role in de-signing of embedded applications. Hardware/software partitioning is one of the most significant part of hard-ware/software co-design of embedded systems. Hard-ware/Software partitioning is essentially multi-objective optimization problem, namely,...
In this paper, a screen printing embedded PDF parser was designed and implemented. Also, hardware accelerator for the graphics rendering engine which are time-consuming most in the whole parsing process was worked out. Many experiments on embedded PDF parser and the frameworks based on hybrid multi-core processors had been conducted to verify system designs and compare performances. The experimental...
In this paper, our work is to frame multi-core processors systems which complete parsing PDF, and in order to parse quickly, we also design hardware accelerator for the graphics rendering engine which are time-consuming most. The final implementation of the system has been tested using a Xilinx University Program Virtex-II Pro Development Board, which features a Virtex-II Pro XC2VP30 Speed Grade -7...
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