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This paper presents the fabrication process development of monolithic microwave integrated circuits (MMICs) based on graphene field effect transistors (G-FETs). In this process, the G-FETs are based on epitaxial graphene on SiC substrate. Base on this process, a wide-band amplifier (0–3GHz) with 6–7 dB gain is realized.
A C-band GaN amplifier is reported. The design method is focused on high linearity load optimization and use of non-linear transistor models to predict harmonic generation and intermodulation products. The amplifier is characterized in terms of S-parameters, single tone and two tone output power. The measured small signal gain is 24.6 dB. The 1 dB compression point is measured at 36 dBm and the output...
An efficiency optimized controlling scheme for dynamic load modulation (DLM) of power amplifiers (PAs) is proposed. In this scheme, both the input signal and load impedance are controlled to allow high efficiency operation of PAs for a desired output signal modulation. The proposed technique is demonstrated by two 1 GHz, LDMOS, switched mode power amplifiers (SMPAs) which are characterized by varying...
In this article, two class D-1 amplifiers is presented, both implemented with GaN MESFETs and working around 900 MHz, delivering 20.7/51.1 W output power with 75/78 % peak drain-efficiency. A simple nonlinear model optimized for switched mode operation is developed from basic device data, and is used to predict intrinsic current and voltage waveforms during the design process. In general, very good...
A 60 GHz compact single-chip sub-harmonically pumped receiver (RX) MMIC has been designed and characterized in a 0.15 mum, ~120 GHz fT/ >200 GHz fMAX GaAs mHEMT MMIC process. The single-chip multi-functional RX MMIC consists of a two-stage amplifier and a sub-harmonically pumped resistive mixer (SHPRM) with an ultra broadband active balun for the LO feed. The RX chip has a very flat frequency response...
We present several building blocks for RF front ends at micro and mm-wave frequencies using 90 nm CMOS. The designs are 20 GHz single- and 40 GHz double stage amplifiers with 5.6 and 7.3 dB gain respectively, a 20 GHz resistive mixer with CL - 7.9 dB and IIP3 - 17.5 dBm plus frequency doublers to 40 and 60 GHz with CL = 15.8 and 15.3 dB respectively. All circuits have been designed using distributed...
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