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A synchronized common sense of time is a key factor for many smart grid applications, such as the sample value process bus operation. The precision time protocol (PTP), as defined in IEEE 1588-2008 standard, is highly recommended for substation communication networks, because it enables synchronization accuracies in the nanoseconds range through conventional Ethernet-based networks. This paper explores...
The communication needs of the different stages of production proposed in the new industrial generation (INDUSTRY 4.0), demand devices that can handle high availability protocols. This paper presents an architecture of a cyber physical production system gateway that can be implemented in an SoC, integrating high availability communication interfaces as the high-availability seamless redundancy/ parallel...
This work analyzes the effect of the different design stages on the failure rate of circuits implemented in FPGAs. A bitstream-based SEU emulation platform is used to inject faults in order to analyze the critical bits of the circuit. Experiments are done on two different testbenchs, an FIR filter and a CORDIC chain. Tests consist on loading different variations of the designs in order to estimate...
Some applications, as those related to space, require an extremely high level of safeness in the electronic hardware. In these cases, redundancy is almost the only way to be really safe; however, the control of redundant elements is not a simple task at all. In this article, we present SafeSoC, a safe electronic card designed for critical applications. Its central processor is an FPGA that manages...
Viewing all electronic systems connected around the world in order to interchange information —i.e., the Industrial Internet of Things (IIoT)— is no more a dream, but a reality. Nowadays, more and more industrial equipment companies are expanding IIoT by creating complex systems that integrate sensors, processors and communication to create intelligent factories, smart grids and even smart cities...
Cyber-Physical Production Systems are characterized by integrating sensors, processing and communication in Industrial Environments like in advanced manufacturing plants or in the new generation Smart Grids. In these context, the accuracy on the synchronization plays a vital role because it is the base for control operations and for the correlation among the distributed sensor data sampling. In this...
Field Programmable Gate Arrays (FPGAs) are commonly used in safety-critical and mission-critical systems. In these applications failures are unacceptable, since they can lead to people injured or huge economical losses. Due to Moore's law and the continuous size reduction, electronic devices are able to perform more and more complex functionalities. However, they are becoming more and more vulnerable...
This paper presents a fault injection method for SEU (Single Event Upset) emulation in FPGAs based on loading at the programmable logic a configuration file with an erroneous bit. A "Xilinx Zynq®-7000 All Programmable SoC" device has been used to implement it, which combines a hard microprocessor (Processing System PS) with Programmable Logic (PL). The emulation tool is fully implemented...
In this paper, the latency times offered by two COTS IEC 62439-3 switch IP cores implementable on FPGAs have been compared. The first one, combines Cut-Through with Store-and-Forward switching architectures. The second IP is based only on Store-and-Forward switching technique. The analysis shows that a custom architecture that combines Cut-Through with Store-and-Forward approaches and takes advantage...
In this paper a new SEU (Single Event Upset) emulation method for testing fault tolerant systems in FPGAs is presented. It is implemented on a “Xilinx Zynq®-7000 All Programmable System on Chip (SoC)” device, which combines a hard microprocessor with programmable logic. An important new feature is that an internal hardware configuration interface controlled by this microprocessor is provided. This...
Reliable Ethernet Networks are gaining acceptance for many Industrial Automation applications. However, the diversity and variety of emerging Ethernet based Industrial Protocols make difficult for the Industry the selection of the technology to implement them. Furthermore, the continue evolution of the standards and their combination increment the risk in the engineering decisions. This need for flexibility...
This paper presents a new approach of the lockstep technique to protect FPGA designs with soft core processors against Single Event Upsets (SEUs) and Single-Event Transients (SETs). One of the biggest drawbacks when using the lockstep technique is the processor context saving and restoring latency. Our approach minimizes the latency thanks to a specific architecture and a specifically adapted 8-bit...
Common features for comparing AES implementations are the latency and throughput of the module as well as its resource requirements. This work evaluates the robustness against punctual errors in the FPGA caused by SEUs or other effects for a variety of AES implementations in order to provide a possible additional feature differentiating various architectures. The AES implementations included in this...
The need of critical applications has derived in the development of several techniques that aim to guarantee system operability. The vast majority of these systems own a microprocessor to control its functionality. Thus, system reliability largely depends on the proper function of the microprocessor. This article presents a state of the art in the techniques for reliable microprocessor architectures...
Increasing the level of abstraction while designing electronic complex systems is one of the main challenges that electronic design teams are facing nowadays. This challenge is closely related to the development of virtual models of components and devices with four main objectives: 1) early software development; 2) architectural exploration; 3) High-Level Synthesis (HLS); 4) Verification through different...
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