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A latency-hiding algorithm for the parallelization of large scale agent-based model simulations (ABMS) on parallel/distributed computing platform is proposed. The key idea of this algorithm is using redundant computations to hide communication latencies. An analytical model for this algorithm is presented to tell how to select R value to reach the best speedup. Compared to B+2R algorithm [1], theoretical...
In order to eliminate the inefficiency of the conventional bus based architecture, network-on-chip (NoC) has been suggested as a novel approach for several years. Considering the trend that hundreds or even thousands of IP blocks will be integrated on a chip, the concept of multi-cluster NoC is proposed. It usually adopts the hybrid architecture mixed with bus based local system and mesh based global...
In current high-speed communication and storage systems, the increasing demand for providing flexible Reed-Solomon (RS) decoding solutions to multi-mode applications has created the desire of universal RS decoders. In this paper, we present a high-speed area-efficient versatile RS decoder architecture based on recursive degree computationless modified Euclidean (rDCME) algorithm. Targeting at different...
We introduce a novel hierarchical cluster based cache coherence scheme for large-scale NoC based distributed memory architectures. We describe the hierarchical memory organization. We show analytically that the proposed scheme has better performance than traditional counterparts both in memory overhead and communication cost.
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