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This paper describes the architecture and key circuit techniques of a PSRAM using the BiCMOSG3 cell for storage array. The important features of the cell from the circuit techniques point of view are reported. An inverting refresh scheme resulting in a very simple refresh circuitry is proposed. The functional separation between refresh amplifiers and sense amplifiers for selective access operations...
The BiCMOSG3 cell, a novel high density memory cell using BiCMOS technology is described. The cell is based on merging four transistors and occupies approximately the area of a single MOS transistor. The implementation of three gain mechanisms and a bipolar output driver transistor into the cell ensures both a very high operation speed and a bit line read out signal of about 1 volt using only operation...
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