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Parasitic extraction is one of the key techniques in very large scale integration design that has been widely used to build the equivalent-circuit model of interconnects. In this paper, a parallel adaptive finite-element method (AFEM) for capacitance extraction of large-scale interconnects (ParAFEMCap) is developed to provide extremely high parallel scalability and numerical accuracy. First, the proposed...
In this paper, a spectral stochastic collocation method (SSCM) is proposed for the capacitance extraction of interconnects with stochastic geometric variations for nanometer process technology. The proposed SSCM has several advantages over the existing methods. Firstly, compared with the PFA (principal factor analysis) modeling of geometric variations, the K-L (Karhunen-Loeve) expansion involved in...
In this paper, a spectral stochastic collocation method (SSCM), is proposed for the capacitance extraction of interconnects with either on-chip process variations or off-chip rough surfaces. The proposed method is based on the stochastic spectral method combined with sparse grid technique, and has several advantages over the existing methods. Compared with the perturbation method, the stochastic spectral...
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