The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, we propose a hybrid parallel decoding strategy for HEVC which combines task-level parallelism and datalevel parallelism based on CTUs. The data-level parallelism makes the execution time distribution of different decoding stages more balanced, and makes the task-level parallelism more efficient. Our approach imposes no constraint on bit streams that they shall be generated by optional...
HEVC (High Efficiency Video Coding) has recently been published as the next generation video coding standard. Compared with previous standards, the coding efficiency is greatly improved at the cost of much higher codec complexity. On the other hand, ARM with SIMD (Single Instruction Multiple Data) instructions is widely deployed on mobile platform, which makes it feasible to accelerate multimedia...
Nowadays, mobile devices are capable of displaying video up to HD resolution. In this paper, we propose two acceleration strategies for Audio Video coding Standard (AVS) software decoder on multi-core ARM NEON platform. Firstly, data level parallelism is utilized to effectively use the SIMD capability of NEON and key modules are redesigned to make them SIMD friendly. Secondly, a macroblock level wavefront...
Acceleration of Audio Video coding Standard (AVS) Jizhun profile decoder has been proposed for ARM Cortex-A with NEON. Data level parallelism is utilized to effectively use the SIMD capability of NEON. Key modules are redesigned to make them SIMD friendly. Our optimized C implementation is set as start point for the acceleration. Thanks to effective use of ARM Cortex-Ax architecture and NEON SIMD...
SIMD (Single Instruction Multiple Data) instructions have been widely used for digital signal processing and multimedia applications, especially video codec. This paper proposes the quarter-pel interpolation acceleration method of the HEVC (High Efficiency Video Coding), which is implemented with ARM SIMD instructions. Data level parallelism is utilized to use the SIMD capability of NEON effectively...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.