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In Smart Power ICs there is the need of new substrate models to be integrated in the design flow of power circuits. This work reports the latest results regarding the substrate modeling methodology based on three-dimensional lumped components extraction of diodes, resistors and contacts. The substrate network including lateral and vertical parasitic bipolar transistor can be automatically created...
Several Hall sensor configurations have been integrated in CMOS technology and analyzed in terms of offset at room temperature and offset drift. We looked for the best geometry that would minimize the offset and its drift. The targeted specification was ±30 µT for offset at room temperature and ±0.3 µT/°C for the drift. The measurement setup developed allows a clean, reliable and fast analysis of...
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