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Ultra-low voltage VLSI designs are gaining widespread attention due to the requirements of minimum energy consuming motes. Leakage energy is a considerable part of the overall energy consumed in the ultra-low voltage domain. This paper deals with the overall energy reduction in ultra-low power systems by the use of digit-serial implementations. Leakage energy is reduced by the reduction of hardware...
This paper presents a high-throughput, cost-effective implementation of six different integer transforms in the H.264/AVC high-profile coders, i.e., 4 ?? 4 forward, 4 ?? 4 inverse, forward Hadamard, inverse Hadamard, 8 ?? 8 forward, and 8 ?? 8 inverse transform, all integrated as a shared hardware. The 4 ?? 4 transform matrices are regularized by using permutation, partitioned into 2 ?? 2 blocks,...
Dynamic voltage scaling (DVS) is a very powerful technique in reducing dynamic power consumption of CMOS circuits. Recent studies showed that intra-task DVS method which adjusts the voltage level during program execution can achieve significant energy reduction. However, the overhead of large number of voltage switching becomes a limitation for its practical implementation. In this paper, we propose...
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