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Multichip power modules use parallel connected chips to achieve high current rating. Due to a finite flexibility in a DBC layout, some electrical asymmetries will occur in the module. Parallel connected transistors will exhibit uneven static and dynamic current sharing due to these asymmetries. Especially important are the couplings between gate and power loops of individual transistors. Fast changing...
The benefits of emerging wide-band gap semiconductors can only be utilized if the semiconductor is properly packaged. Capacitive coupling in the package causes electromagnetic interference during high dv/dt switching. This paper investigates the current flowing in the parasitic capacitance between the output node and the grounded heat sink for a custom silicon carbide power module. A circuit model...
This paper investigates gate driver design challenges encountered due to the fast switching transients in medium voltage half bridge silicon carbide MOSFET power modules. The paper presents, design of a reduced isolation capacitance regulated DC-DC power supply and a gate driver with an active Miller clamp circuit for a 10 kV half bridge SiC MOSFET power module. Designed power supply and the gate...
Medium voltage 10 kV Silicon Carbide MOSFETs, introduce challenges regarding converter design. Very high rate of voltage change and capacitive couplings to for example cooling systems cause increased electromagnetic interference. The aim of this paper is to accurately model the capacitive coupling to a heat sink and experimentally validate the model. An analytic model of the heat sink is developed...
The poor body diode performance of the first generation of 10kV SiC MOSFETs and the parasitic turn-on phenomenon limit the performance of SiC based converters. Both these problems can potentially be mitigated using a split output topology. In this paper we present a comparison between a classical half bridge and a split-output power module. It is found that the peak current during turn-on is reduced...
This paper focuses on circuit mismatch influence on performance of paralleling SiC MOSFETs. Power circuit mismatch and gate driver mismatch influences are analyzed in detail. Simulation and experiment results show the influence of circuit mismatch and verify the analysis. This paper aims to give suggestions on paralleling discrete SiC MOSFETs and designing layout of power modules with paralleled SiC...
In this paper a 5kW step-down converter for low-voltage high-current application is presented using normally-off SiC JFETs as high voltage power switches, operating with efficiency close to 98%. Different low voltage side rectification solutions and loss estimations are also presented. As results show higher power density and efficiency can be achieved in medium- or high-power DC-DC applications by...
Silicon Carbide MOSFETs are now widely available and have frequently been demonstrated to offer numerous advantages over Silicon based devices. However, reliability issues remain a significant concern in their realisation in commercial power electronic systems. In this paper, a test bench is designed that enables an accelerated power cycling test to be performed on packaged Silicon Carbide MOSFETs...
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