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This paper presents a high speed parallel segmented capacitive DAC that is implemented in a 10-bit 150MSample/s successive approximation register (SAR) ADC. Compared to converters that use the conventional structure, the speed of converting one bit digital code can be 4 times faster while the power remains relatively low. In the switching procedure, a small capacitor array is used to determine the...
A 0.5V 6-to-10b rate-resolution scalable SAR ADC with microwatt power consumption is presented. Employing the successive approximation register (SAR) architecture, the proposed ADC exhibits the sampling rates of 125kS/s, 150kS/s and 250kS/s at scalable resolutions of 10b, 8b and 6b, respectively. A low-leakage voltage boosting technique is proposed, which reduces the leakage of MOS switches by 99%...
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