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Aging and soft errors have become the two most critical reliability issues for nano-scale CMOS circuit. First, in this paper, the aging effect due to bias temperature instability (BTI) is analyzed on different logic gate using 45nm Technology, and simulated the critical charge and delay which can influence soft error rate (SER) result. Second, a method of SER calculation considering BTI effect is...
TSV (Through-silicon Via) meets the demands of high speed and low power consumption in 3D integrated circuits. However it faces challenge in signal integrity problem such as crosstalk. TSV to TSV coupling is the most significant crosstalk problem in TSV based 3D ICs. This paper presents a quantitative estimation on the TSV to TSV crosstalk induced interconnect delay, trying to find the worst interconnect...
This paper presents an electromechancial interface model of liquid floated micro-gyroscope, which can analyze sensing capacitors and resistance of gyroscope. The impacts of them are analyzed and simulated with the simulation software of circuit. The analytic results indicate that the reasonable interface circuit can substantially remove the impacts of these parasitic capacitances, increase the signal...
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