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This work reports the observations of different geometry and temperature dependencies of electrical characteristics of silicon nanowire transistors with gate length of a couple microns. Several abnormal characteristics degradations were observed. As the gate lengths as well as the source/drain doping level of the devices under investigation were well beyond the punchthrough conditions, these observed...
This work reports the observation of abnormally large off-state currents in silicon nanowire transistors with gate length less than 2.5 μm. As the gate lengths as well as the source/drain doping level were well beyond the punchthrough conditions, we ascribed this observation to the charge transport along the corners/boundaries of the nanowires. Temperature dependent characteristics were also investigated...
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