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This paper describes the design considerations and performance of the highest frequency phase-locked loop (PLL) reported to date. The PLL was fabricated in a 0.13-μm SiGe BiCMOS process and integrates on a single die: a fundamental-frequency 86-92 GHz Colpitts voltage-controlled oscillator (VCO), a differential push-push 160-GHz Colpitts VCO with two differential outputs at 80 GHz, a programmable...
This paper describes the highest frequency PLL reported to date. It achieves the widest locking range and the lowest phase noise of -93.8 dBc/Hz at 90 GHz and 78.9 dBc/Hz at 163 GHz, both measured at a 100-kHz offset. The PLL was fabricated in a 0.13-μm SiGe BiCMOS process and covers the 81-82 GHz, 86-92 GHz, and 162-164 GHz bands. It integrates on a single die a fundamental-frequency 86-92 GHz Colpitts...
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