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This study has opened a possibility to fabricate through silicon vias (TSV) in a LSI wafer available by commercial multi-project wafer (MPW) service and integrate the LSI and MEMS by wafer bonding. 300 μm deep Cu annular type TSV were fabricated in a TSMC 0.18 μm CMOS LSI MPW cut into 4″ diameter. The developed TSV process managed mechanically fragile property of the laser-ablated MPW by low stress...
Wafer-level vacuum sealing and electrical interconnection are often crucial for advanced device packaging. This article presents a novel packaging and integration technology, which is applicable to non-planar (i.e. microstructured) and/or temperature-sensitive wafers, by means of Au-Au low-temperature thermo-compression bonding utilizing electroplated Au microbump that surface has been planarized...
Wafer-bonding-based integration can be rapidly and easily tested between different types of devices by wafer-to-wafer flip-chip transfer technology described in this paper. Devices to be tested (e.g. MEMS) on a support wafer are bonded and electrically connected with a target wafer (e.g. LSI) using sticky silicone bumps, and then any of the devices are selectively debonded from the support wafer by...
In this study, a new process to temporarily integrate two components via an elastic and sticky silicone layer was developed. The developed integration process is as easy as contact photolithography and even reworkable, and thus will be useful for the quick test of hetro-integrated devices made of different materials of wafer. It was applied to integrated SAW oscillators with resonance frequencies...
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