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Scan design has been widely used to facilitate the testing of integrated circuits (ICs). However, it also provides attackers a side-channel to access the internal states of crypto chips and thus becomes a great threat to the security of the cipher keys. We propose a secure scan design scheme to protect crypto chips against such scan-based side-channel attacks. In this scheme, we introduce a shift...
Fault Sensitivity Analysis (FSA) is an emerging fault based attack that utilizes the sensitive circuit delay information to retrieve keys. However, one of the major limitations of the existing FSA methods is that they are restricted to specific implementation of the AES S-box. In this paper, we introduce the notion of right or wrong collision rate to replace the current Hamming weight model. Based...
Physical unclonable functions leverage the manufacture variations during silicon fabrication process and have found many security related applications. The ring oscillator PUF relies on pairs of ring oscillators which have sufficiently large difference in delay to generate reliable bits. Current RO PUF approaches use redundancy to provide reliability under different operating temperature and thus...
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