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In this paper, we present a high speed yet energy efficient approximate divider where the division operation is performed by multiplying the dividend by the inverse of the divisor. In this structure, truncated value of the dividend is multiplied exactly (approximately) by the approximate inverse value of divisor. To assess the efficacy of the proposed divider, its design parameters are extracted and...
This paper concentrates on the problem of minimizing power consumption during scheduling in high-level synthesis using a dual threshold voltage (dual-Vth) technique. In the proposed method, first all the operations are initialized to high-Vth, which generally cause violations of timing constraints. Then a set of operations are reassigned to low-Vth to meet the latency constraint in such a way that:...
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