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Modern industrial process instrumentation systems like radar based flow meters demand for scalable modular hardware platforms to meet the requirements for integration in heterogeneous Cyber-Physical Systems (CPS). Recent advances in System on Chip (SoC) technology allow integration of multichannel frequency modulated continuous wave (FMCW) radar sensors with real-time signal processing capabilities...
Due to the demographic change in western society, new challenges regarding healthcare of the elderly population are at the verge of surfacing. Since young people are not capable of sustaining an adequate healthcare for elderly people, new healthcare fields have to be devised. Recent advances in information and communication technology enable the support of elderly people in their domestic environment...
Industry 4.0 is a reality through the use of intelligent networks capable of gathering and analyzing data and acting on it autonomously. However, important advancements can be made when reconfigurable hardware comes into play. This work presents current trends used in the development of digital circuits, then enumerates a series of challenges faced in the Cyber-Physical Systems environment and, lastly,...
The first two editions of the Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES) were co-located with the International Parallel & Distributed Processing Symposium (IPDPS) in 2013 and 2014. They took place in Boston and Phoenix, USA, respectively. The third edition of ViPES was held on the 19th of July, 2015, co-located with the International Conference on Embedded Computer...
The FlexTiles Platform has been developed within a Seventh Framework Programme project which is co-funded by the European Union with ten participants of five countries. It aims to create a self-adaptive heterogeneous many-core architecture which is able to dynamically manage load balancing, power consumption and faulty modules. Its focus is to make the architecture efficient and to keep programming...
Advanced driver assistance systems (ADAS) have become very prominent in todays automobiles. The technological advancement of already familiar assistance systems enable the car to now autonomously assess the current situation and react accordingly. In terms of data processing, there is no difference between actually acting i.e. accelerating, braking or steering and just issuing warnings to alert the...
A victim cache is a small memory block usually connected after the first level cache, and provides recovery of recently evicted cache blocks. This small component can significantly improve the hit rate of the cache hierarchy. However, its effectiveness varies greatly with the application. Thus, tuning the victim cache in combination with its upper cache level to fit the running application can yield...
In this paper, we introduce an IP-core which operates as glue logic between the programmable logic of a FPGA and a Cypress EZ-USB FX3 (FX3) USB-3.0 transceiver. The developed IP core communicates with other logic via AXI-4 and enables half duplex connections between the linked logic and the FX3. Thereby the platform can be used by several applications which need a high speed communication to a USB-3...
In this paper, we introduce a prototype attention detection system for automotive drivers. The driver is monitored through a Microsoft Kinect camera which provides RGB, depth, and infrared images in order to cover situations in which normal cameras might not achieve good results. The Kinect is connected to a Xilinx ZedBoard wich uses a Zynq-7000 SoC as processing platform. The attention detection...
In this paper, we present a new online hardware/software (HW/SW) scheduling algorithm for a 3D Reconfigurable SoC platform comprising a multiprocessors layer and a heterogeneous reconfigurable layer. The proposed algorithm decides on the fly whether the tasks will run in SW or HW, at which time, on which processor or in which region of the reconfigurable layer in order to minimize the overall execution...
A victim cache is a small cache block usually located between two main cache levels, which main objective is to recover conflict cache misses. In the usual case, the victim cache is designed as an always enabled cache block with fixed size. However, different applications may have very different memory access requirements. In this article, we present an analysis of the relations between a victim cache,...
In today's cars, more than 50 electronic control units are used to provide safety and to care about the occupants comfort. The development of advanced driver assistance systems is a key role in the automotive domain. It is essential to validate and verify results and to ensure faultless interoperability of the embedded systems. Not uncommonly, the dimensioning of parameters affects safety aspects...
Isn't it the most exciting time ever to work on reconfigurable computing! This statement, although true during past decades when new breakthroughs in technology evolution were made, particularly is true today. To what other conclusion should one come considering the societal challenges we are facing in the context of sustainable energy generation and distribution, the transition towards a smarter...
The use of reconfigurable FPGA devices to support the execution of computationally intensive software tasks is discussed in this paper. A system architecture consisting of multiple serially-connected FPGAs is developed, where each FPGA holds a pool of reconfigurable regions. An accelerator can be reconfigured into a region, replaced or discarded at runtime. Configurable connection blocks are responsible...
Today ubiquitous computing is steadily growing in daily life, leading to an increasing need of resource awareness especially for devices with limited energy source. The running applications may differ significantly in their requirements and priority and these variations can occur during a single running application as well. Apart from the applications' constraints, there are regularly restrictions...
Configuration prefetching is known as an effective technique for hiding the reconfiguration delay of hardware accelerators in Partial Region FPGA. In prefetching, a hardware task can be loaded as soon as possible even if it cannot execute immediately after its reconfiguration due to the involvement of dependencies with other tasks. But due to the access in advance, the configuration delay is hidden...
Pd@SnO2 and SnO2@Pd core@shell nanocomposites are prepared via a microemulsion approach. Both nanocomposites exhibit high‐surface, porous matrices of SnO2 shells (>150 m2 g−1) with very small SnO2 crystallites (<10 nm) and palladium (Pd) nanoparticles (<10 nm) that are uniformly distributed in the porous SnO2 matrix. Although similar by first sight, Pd@SnO2 and SnO2@Pd are significantly different...
Several recent studies have shown the technological feasibility of dynamically reconfigurable field programmable gate arrays (FPGA). In this paper, we introduce an application scenario from the area of autonomous robots which benefits from this technology as it uses elastic algorithms. The processing unit in an autonomous robot must handle localization, cognition, motion control, and perception. We...
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