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In this paper, a K-band power amplifier using 1.8-V supply voltage utilizing pre-distortion parasitic diode linearizer is designed, measured and implemented in TSMC 0.18-μm CMOS process. Direct shunt power combining technique is adopted to obtain higher output power. Low insertion loss parasitic diode linearizer is utilized to improve overall circuit linearity. The proposed 3-stage common-source PA...
We proposed a vertical magnetic coupled interconnect design procedure for 3D IC stacking. As the interconnect is modeled as a coupled inductor pair, we can convert it into a bandpass filter by adding series and shunt capacitors. With given center frequency and bandwidth of the bandpass filter, the required self and mutual inductance in magnetic coupled interconnect and serial and parallel capacitance...
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