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We engineer a scalable and CMOS-friendly RRAM stack using down to 3nm ALD-based Ta2O5. The 20nm-sized TiN\Ta2O5\Ta device operated at 50µA exhibits ultra-fast write (∲5ns) at moderate voltage (<2V) with >109 write endurance. We also demonstrate excellent disturb and retention characteristics, which we relate to the appropriate tuning of the oxygen chemical-potential profile along the filament...
We demonstrate sub-500nA switching and tunable set voltage by inserting thin Al2O3 layer in TiN\HfO2\Hf\TiN RRAM cell. Stack engineering clearly led to novel insights into the switching phenomenology: (i) O-scavenging is key in the forming process and stack-asymmetry management; (ii) dielectric-stack thinning allows lower forming current; (iii) ‘natural’ (asymmetry-induced) reset switching takes place...
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