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Mersenne Twister (MT) algorithm is one of the most widely used long-period uniform random number generators. In this paper, we present a novel and efficient hardware architecture for MT method. Our design is implemented on a Xilinx XC6VLX240T-1 FPGA device at 450 MHz. It takes up 0.1% of the device and produces 450 million samples per second, which is 2.25 times faster than a dedicated software version...
It has been observed in the past that the PathFinder routing algorithm runtime could be hampered by high fan out nets, primarily due to the time spent on the initialization of the priority queue. However, a solution has only been reported for routability/wirelength driven routers. In this paper, we report two heuristics that address the same issue for timing-driven routers. We show that on standard...
The Well Equidistributed Long-period Linear (WELL) algorithm is proven to have better characteristics than the Mersenne Twister (MT), one of the most widely used long-period pseudo-random number generators (PRNGs). In this paper, we propose a hardware architecture for efficient implementation of WELL. Our design achieves a throughput of 1 sample-per-cycle and runs as fast as 449.4 MHz on a Xilinx...
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