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Fault tolerance of hardware failure is a challenging work for parallel programming in massively parallel processing environment. However, traditional rollback-recovery techniques, which an be classified into checkpoint-based and log-based, would introduce extra overhead for recording an overall snapshot of an application. For a specialized programming model, a private recovery technique is valuable...
We introduce a novel parallel combined classifiers method for the problems of protein classification and remote homology detection. The method use parallel computing idea to rebuild the high accuracy SVM-based algorithm and the complete coverage nearest neighbor algorithm. We run the two classifiers simultaneously and combine the output result together to reduce the running time and improve the classification...
Transport triggered architecture (TTA) is one kind of application-specific instruction processors (ASIP), which fits embedded systems and offers a cost-effective trade-off between the energy-efficiency and performance. However its architecture and very long instruction word (VLIW) are alike, which also results in a very poor code density. In embedded systems, memory is one of the most expensive resources...
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