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Multi-level-cell (MLC) is a critical technology to achieve low bit cost for phase change memory. However, resistance drift is an intrinsic material property that kills memory window and imposes formidable challenges for MLC. In this work, we report a radically different sensing concept that exploits the non-linear R-V characteristics of PCM that can easily accommodate 8 resistance levels in three...
Inherent cell variation of phase change memory is difficult to control by material or device engineering alone. We previously reported R-I curve shift detection scheme as a good method for monitoring PCM cell characteristics. This paper extends that concept and proposes a Stress-trim procedure to tighten R-I characteristics for PCM MLC operation. By leveraging the right-shift phenomena of PCM R-I...
Conventional phase change memory (PCM) stores information in amorphous/crystalline states that can be read out as HRS/LRS. In this work we report a radically different mode of storage that can concurrently and independently work with the conventional storage mode. By stressing the memory cell with current we can shift the threshold for RESET switching, and the resulting R-I curve can be used to store...
Using the dual Vth characteristics of a multi-layer SiO2/SiO2/Cu-GST conducting bridge (CB) structure we can construct a one-resistor cell without an access device (0T1R). Like 1T Flash memory the Vth is used to store the logic state thus leaving all devices always at high resistance state and a separate isolation device is not needed. The Vth of the cell is determined by the presence of CB in the...
For the first time we demonstrate that a Phase Change Memory (PCM) packaged chip can hold pre-coded data after an industrial standard lead free solder bonding reflow process. Good “0” and “1” state distributions are retained in a 90nm 128Mb PCM chip after the soldering process. Furthermore, the tested chip endures more than 10 million write cycles after the pre-coding and high temperature process.
A method based on Frenkel-Poole emission is proposed to model the amorphous state (high resistance state) in mushroom-type phase-change memory devices. The model provides unique insights to probe the device after amorphizing (RESET) operation. Even when the resistance appears the same under different RESET conditions, our model suggests that both the amorphous region size and the defect states are...
Data retention loss from the amorphous (RESET) state over time in Phase-Change Memory cells is associated with spontaneous crystallization. In this paper, the change in the threshold voltage (VT) of memory cells in the RESET state before and after heating is used as a probe into the nature of the retention loss mechanisms. Two mechanisms for the retention loss behavior are identified, responsible...
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