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Recent research has shown that tests generated without taking process variation into account may lead to loss of test quality. At present there is no efficient device-level modeling technique that models the effect of process variation on resistive bridges. This paper presents a fast and accurate technique to model the effect of process variation on resistive bridge defects. The proposed model is...
The growing complexity of systems and their implementation into silicon encourages designers to look for ways to model designs at higher levels of abstraction and then incrementally build portions of these designs - automatically or manually - from these high-level specifications. Unfortunately, this translation process itself can be buggy, which can create a mismatch between what a designer intends...
Optical lithography is an indispensible step in the process flow of design for manufacturability (DFM). Optical lithography simulation is a compute intensive task and simulation performance, or lack thereof can be a determining factor in time to market. Thus, the efficiency of lithography simulation is of paramount importance. Coherent decomposition is a popular simulation technique for aerial imaging...
Requirements are more than a set of system level goal-statements, which originate from different viewpoints of stakeholders. We can classify the requirements objectively along several dimensions: users, data, operations, performance, security, etc. There are important relationships among requirements that are based on the relationships among the data and operations. We study the role of these relationships...
Lithographic variability and its impact on printability is a major concern in today's semiconductor manufacturing process. To address sub-wavelength printability, a number of resolution enhancement techniques (RET) have been used. While RET techniques allow printing of sub-wavelength features, the feature width itself becomes highly sensitive to process parameters, which in turn detracts from yield...
Sub-wavelength lithography causes the shape of transistors to differ from idealized rectangles. Several researchers have proposed transistor simulation models to characterize the non-ideal shapes of transistors for various regions of transistor operation. It has been shown that the effective channel length of a non-rectangular gate (NRG) transistor may be different for ON and OFF currents. In this...
Soft errors caused by ionizing radiation have emerged as a major concern for current generation of CMOS technologies and the trend is expected to get worse. Soft error rate (SER) measurement, expressed as number of failures encountered per billion hours of device operation, is time consuming and involves significant test cost. The cost stems from having to connect a device-under-test to a tester for...
A general model for computation of energy states in aperiodic multiple quantum well (MQW) structures has been proposed. The MQWs are aperiodic and asymmetric with varying well and barrier widths. The tunnelling probability of the electrons through these aperiodic barriers has been studied by assuming coupling between adjacent pairs of wells. Effect of the barrier dimensions on tunnelling properties...
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