The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, a new methodology is proposed to improve digital circuit signal integrity, in the presence of power-supply voltage (Vdd) and temperature (T) variations. The underlying principle of the proposed methodology is to introduce on-line additional tolerance, by dynamically controlling the instant of occurrence of the clock edge trigger driving specific memory cells. On-line, dynamic delay...
As IC technology scales down, power supply instability may dramatically contribute to signal integrity loss. In this paper, the authors propose a new methodology to enhance circuit tolerance to power-supply voltage (VDD1) local variations, without degrading its performance. The underlying idea is to add additional tolerance to the edge trigger of the clock signal driving specific memory cells. The...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.