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A case study is presented for hierarchical agent monitoring design approach, which provides a high level abstraction for designing monitoring functions on massively parallel and distributed systems. The case study features hierarchical power monitoring on NoC platforms, where each level of agents perform specific monitoring operations based on their granularity. The monitoring hierarchy and operations...
To continue the growth of the number of transistors on a chip, the 3D IC practice, where multiple silicon layers are stacked vertically, is emerging as a revolutionary technology. Partitioning a larger die into smaller segments and then stacking them in a 3D integration can significantly reduce latency and energy consumption. Such benefits emanate from the notion that inter-wafer distances are negligible...
The task is to analyze, how different services can be designed for the SegBus multiprocessor platform and observe the improvement in system performance. In this paper, we utilize the concept of broadcasting and multicasting service from standard data bus for multiprocessor systems to enhance the performance of SegBus platform. The running example is represented by the H.264 encoder. The SegBus platform...
In this paper we approach the performance aspects of MPSoC platforms, from the point of view of IP placement with the focus on network-on-chip (NoC). Proper IP placement is important for several time-dependent applications such as video and voice where traffic must be delivered on time in order to operate properly. Proper placement of IPs can lower the traffic congestion, improve overall execution...
The paper presents a Domain Specific Language (DSL) for a multi-core segmented bus platform, SegBus. The DSL, based on a UML profile, consists of graphical platform elements in the form of stereotypes with the necessary tagged values to depict platform aspects at high level of abstraction. Customizations are applied to each stereotyped element in the form of user-defined rules to restrict relationship...
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