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This paper presents a reconfigurable high-pass (HP) time-interleaved (TI) delta-sigma (SigmaDelta) analog-to-digital converter (ADC) from theoretical and practical points of view. This ADC is designed to fulfill the requirements of GSM, UMTS, WiFi and WiMAX standards. The reconfiguration is performed by adjusting the interpolation factor, the SigmaDelta modulator order and the number of active channels...
An architecture of cascaded delta-sigma modulator is presented. It attains a significant improvement in achievable SNR, dynamic range and has the additional advantage of reduced sensitivity to switch and op-amp nonlinearities. The design consists of approximating quantizer-gain by functional simulation of the modulator and then keeping this value in view while conceiving digital filters. Digital filters...
A technique for optimizing the number of channels for time-interleaved sample-and-hold is proposed. This technique permits to extract the figure of merit of a single sample- and-hold circuit while taking into account the limited gain- bandwidth of a family of operational amplifiers sharing the same topology. A double-sampled architecture of sample-and-holds is used to reduce die area and power consumption...
This paper presents an analysis of various noises in high-pass ΔΣ modulator. The effect of jitter and switch noise is the same in HP modulator than in conventional modulator. These noises can be considered as white noise and increase the in band noise floor degrading the performance of the high-pass ΔΣ modulator. However, unlike the effect of op-amp noise in the conventional modulator, the op-amp...
A novel output stage for OTAs and opamps for gain enhancement is described. The proposed circuit using positive feedback to cancel the output conductance allows the DC gain to be enhanced without affecting the bandwidth of the OTA and opamp.<<ETX>>
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