The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper presents the challenges associated to the design of ADCs which must be compliant with 4G/LTE/LTE-A radio requirements. Primarily, the challenges are caused by increasing spectrum bandwidth, multi mode operation and the need of limiting the power consumption in the handset and in the base station. Therefore, wideband converters with high linearity (up to 100 dB of SFDR) and low power consumption...
Clock-skew errors in time-interleaved (TI) analog-to-digital converters (ADCs) importantly degrade the linearity of such converters. These nearly constant but unknown errors, which must not be confused with random jitter, prevent TI ADCs from performing uniform sampling. This paper proposes a mixed-signal clock-skew calibration technique and explores its limitations to perform a background calibration...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.