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High speed vision system on-chip testing at full operational rate is a difficult task. It requires bulky optical and lighting setup, and target objects composition. This paper investigates the possibility of the usage in such situations the DMD based digital light processing (DLP) technology.
The ASIC implementation of a 64times64 sized mixed-signal cellular visual microprocessor architecture with digital processors is described. Measurement results are shown. The architecture is composed of a regular photosensor readout circuit array, prepared for 3D sensor integration, an array of identical SIMD processing elements, and central program scheduler. The processing architecture supports...
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