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A 1Gs/s CMOS track-and-hold for the upcoming generation of Ethernet applications (10GBASE-T) is presented. The Track-and-Hold is designed to be employed as front-end in a time-interleaved analog-to-digital converter and it is based on an open-loop architecture composed of an input buffer and a highspeed switch. The proposed Track-and-Hold, designed in a 65 nm low-power CMOS process, exhibits a total...
The brief presents the design and the implementation of a very-high speed track-and-hold amplifier (THA) for analog-digital converters with high input bandwidth. The THA is based on a half-bridge driving a switched-emitter follower. A lower power consumtpion and a simpler circuit architecture than previously reported bipolar implementations were achieved by means of circuit optimization. In particular,...
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