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Low frequency noise characterization is used to compare the quality and reliability of gate dielectric processed using both gate-first and gate-last or replacement metal gate integration schemes. The influence of different processing treatments will be studied, for both planar and FinFET devices, and the obtained results compared with the LF noise specifications of the International Technology Roadmap...
The low-frequency noise of gate-last pMOSFETs is studied, with particular attention to the passivation of oxide traps by fluorine. It is shown that the lowest flicker noise power spectral density is obtained after 6 min of exposure to an SF6 plasma. At the same time, the dominant 1/f-noise mechanism changes from carrier number fluctuations to mobility fluctuations, indicating the de-activation of...
We discuss several advancements over our previous report (S. Kubicek, 2006): - Introduction of conventional stress boosters resulting in 16% and 11% for nMOS and pMOS respectively. For the first time the compatibility of SMT (stress memorization technique) with high-kappa/metal gate is demonstrated. In addition, we developed a blanket SMT process that does not require a photo to protect the pMOS by...
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