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Nowadays there is a strong demand for higher speed, low leakage, low power and low noise SRAM cell to develop a high speed memory. In this paper conventional 6T SRAM has been replaced by a 8T SRAM circuit. The access transmission gates (access TG 1 & access TG 2, shown in Fig 2) have been used instead of simple pass transistors to reduce leakage current. The lower power consumption, lower leakage...
A full adder circuit is one of the basic building blocks of a digital design. In general it is made by CMOS technology. In the CMOS technology the full adder is built by 28 transistors. So, the transistor count is very high. The average power consumption, leakage power consumption and delay is very high. In this paper we made a new circuit which is made by mainly the transmission gate (TG) technology...
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