The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
With rapid technology scaling, the proportion of the static power catches up with dynamic power gradually. To decrease leakage power is becoming more and more important in low-power design. This paper investigates leakage reduction of adiabatic circuits using power-gating schemes under deep submicron process. The energy dissipations of DTGAL (dual transmission gate adiabatic logic) circuits with power-gating...
Leakage dissipation is more and more dominant. Limiting leakage power consumption becomes an important factor in IC designs. This paper presents a reduction technique of leakage consumption for adiabatic sequential circuits based on two-phase CPAL (complementary pass-transistor adiabatic logic) using power-gating scheme. A practical sequential circuit with a mode-5??5??5 counter using two-phase CPAL...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.