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We propose a Loadless 4T SRAM cell using degenerately doped source (DDS) p-channel In0.53Ga0.47As Tunnel FETs (TFETs) as dual purpose access/load devices and low leakage steep sub-threshold n-channel TFETs as drive devices. A Loadless 4T CMOS SRAM cell has the requirement that the leakage current of the PMOS access transistors should be larger than the leakage current of the NMOS drive transistors...
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