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With the development of semiconductor technology, more modules are integrated onto a single chip. Multiprocessor system-on-chip (MPSoC) is such circuit with multiple embedded processor cores on chip. It provides high parallelism with multi-threads through the multiple cores. Memory system is still the bottleneck of the performance and power-consumption of MPSoC systems. Scratchpad memory (SPM), which...
More and more cores are integrated onto a single chip to improve the performance of processors and reduce the power consumed by computing. The interconnection of the cores is a new issue for high performance. Network-on-Chip (NoC) is proposed as the promising paradigm for this problem. Because there are many cores on chip, different on-chip interconnection structures have been proposed. Hybrid interconnection...
Network on Chip (NoC) is considered to be the best candidate for future on-chip communication; however, with the increase in the number of on-chip processors, the simultaneous memory accesses of these processors can cause serious main memory bottleneck problem. In this study, we have proposed the concept of Network Main Memory (NMM). NMM has distributed network architecture for main memory and multicommunication...
Network on Chip (NoC) is proposed as a promising solution for processors with many cores integrated onto a single chip. The main advantages of NoC are favorable scalability and high bandwidth for on-chip cores and communications. However, OS designed for NoC have not been fully researched to date. Because the microkernel operating system is composed of modules, such architecture is suitable to execute...
With the development of the semiconductor industry, more processors can be integrated onto a single chip. Network-on-Chip (NoC) is an efficient solution for the interconnections on chip for many-core system with many processor cores on chip. However, enhancing performance with lower power consumption is still a challenge. The core issue is the mapping of applications to NoC. A common method is to...
Networks on Chip (NoCs) are considered to be the best candidate for the future on-chip communication of Chip Multiprocessors (CMPs). However, till date, general-purpose operating systems (OSs) for NoC-based CMP have not been examined. As the trend of NoC-based CMPs continues, OSs are required for the efficient use of NoC and for providing environment for general-purpose applications. In this study,...
Network-on-Chip (NoC) is proposed to solve the communication bottleneck for multi-core SoC. Performance is one of the most critical feature of the NoC. Many different approaches have been introduced to improve the performance of NoC. However, most of them focus on the network part of NoC architecture and neglect other important parts of the system, especially the processor core part. This paper proposes...
Computer organization and design course is one of the fundamental courses for computer science education. With the rapid progress in semi-conductor, new technologies in computer science are also emerging. It becomes more challenging for universities to design computer organization and design course. More new teaching methods and innovations are used to obtain better teaching effects as the corresponding...
Network on Chip (NoC) has been proposed as a new paradigm for designing System on Chip which supports high degree of scalability and reusability. Mapping an application, which is described by a parameterized task graph, onto NoC is a key research problem in NoC design. In this paper, we first propose an energy-aware cores mapping approach on WK-recursive NoC, and then present a fast clustering-based...
Scratchpad memory (SPM) is software-controlled on-chip memory with shorter access time and lower power consumption compared with cache. SPM is used increasingly widespread to meet the strict requirements on performance, power consumption and design cost of the embedded systems. This paper presents an efficient SPM management based on multi-thread for multiprocessor system on chip (MPSoC) architecture,...
The wide application of embedded systems becomes a trend in the post-PC era. Embedded systems have been deployed in numerous fields which have different requirements of embedded systems architecture. In order to adapt to the needs of different fields, this paper proposes a new course model for embedded system education. This course model extends the previous model which only concerns ARM architecture...
Hierarchy memory units are used in embedded systems for their different performance. The scratch-pad memory has been used to meet the real-time constraints in embedded systems. This paper presents an efficient compiler-assisted approach based on scratch-pad memory for heap and stack management of embedded systems. The stack and heap will be mapped to scratch-pad memory and some special code will be...
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