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We have designed and fabricated a 2×4 electrochemical image sensor with CMOS signal processing circuits integrated on a single chip. Using a well-studied ferricyanide solution, a clear cyclic voltammetry curve was obtained from each working electrode of the array sensor. The external components used include a data generator and a data recorder. This sensor chip is an early prototype of a fully integrated...
This paper presents a high-speed low-density parity-check (LDPC) decoder chip using a new decoding algorithm, called a flooding-type update-schedule algorithm. Since node computations are performed using partially updated messages in the proposed algorithm, because of the good similarity among time-consecutive messages, data-transmission bottleneck between nodes for node computation is greatly reduced...
This paper describes the experimental characteristics of RF components with layout and structural optimization, fabricated in 0.10-mum 1.2-V SOI-CMOS technology with partial trench isolation (PTI). ESD protection-grounded gate SOI-NMOSFETs achieve high reliability due to body-tied structure with PTI, and newly proposed ESD diodes also derive superior performance. Moreover, this technology offers a...
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