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Silicon photonics circuits are playing more and more important role in optical communication and interconnect fields [1, 2]. Many silicon CMOS technique compatible photonics integrated devices are reported [3, 4]. Most of those silicon components are based on optical waveguide. But conventional integrated optical waveguide is without memory feature. One hand, which makes us in trying to change the...
We propose CMOS-compatible multi-layered waveguide system for silicon hybrid integration. Numerical simulation of vertical light coupling between different layers, and fabrication of dual-layered waveguide devices for multiple die-to-wafer bonding are performed, suggesting the integration feasibility.
The development and assessment of ArF technology in a 200mm FAB line are described. Wafer-level measurement is implemented to explore the dummy pattern effect on cross-wafer uniformity and examine fundamental Si photonics devices.
We design and fabricate silicon vertical slot waveguides. Ultra-wide bandwidth 1.8-Tbit/s (161 WDM 11.2-Gbit/s OFDM 16-QAM) data transmission through 1-mm, 2mm, 3.1-mm, 12.2-mm-long silicon vertical slot waveguides are demonstrated in the experiment. All 161 WDM channels achieve BER less than 1e-3 after propagating through silicon vertical slot waveguides.
We report the simulation, fabrication, and measurement results of a waveguide grating coupler that could efficiently couple light between submicrometer-sized planar waveguides and vertical optical fibers. The coupler comprises a section of chirped grating which reduces back reflection and enhances coupling efficiency. Coupling efficiency of over 34% was measured and a 3-dB bandwidth of 45 nm was obtained...
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