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Low-temperature Cu/Sn/Cu solid-state-diffusion (SSD) bonding has been investigated in this paper. Twenty-micrometer fine-pitch bumps with daisy-chain and Kelvin structures were fabricated by high-efficiency and low-cost electroplating process. Before bonding, the bump surface was treated with Ar(5% H2) plasma. Wafer-level bonding was performed with a pressure of 6.7 MPa at 200 °C for 60 min. Microstructure...
A novel low temperature wafer-level Cu-Cu bonding method using Ag nanoparticles (NP) was proposed and realized in this paper. A bonding structure consisted of Cu bonding pads, TiW barrier/adhesive layer was firstly fabricated on the silicon wafer. Ag NPs were then deposited by physical vapor deposition (PVD) on Cu pads. The morphology of Ag NPs annealed at different temperature was studied. Bonding...
In order to lower Cu-Cu bonding temperature and shorten bonding time applied for 3D integration, nanostructure has been introduced on bonding Cu surface. However, few studies have been reported on Nano Particles (NPs) formation by film deposition process such as pulsed laser deposition (PLD), which would be compatible with CMOS process. In this work Ag nanostructure containing strings of NPs was formed...
In this paper, wafer level room temperature ultrafine pitch Cu-Cu direct bonding was accomplished followed by annealing process at the temperature of 300 °C for 30 min. Cu pad pitches of 15μm, 20μm and 25μm with different pad size of 2μm, 3μm and 4μm were designed and fabricated on 300mm wafers. Additionally, Cu pad pitch of 6μm, 7μm, 8μm with Cu pad size of 3μm was also designed on the wafer by considering...
The icing flashover is increasingly becoming a serious problem with the development of the extra-high voltage engineering. Reducing the bonding strength between the substrate and the ice by super-hydrophobic coating is a choice for the anti-icing. The bare insulator, RTV coated insulator and the super-hydrophobic insulator are chosen for comparing. The experimental facility is set up. The vertical...
Copper chemical mechanical polishing (CMP) and wafer thinning technologies have been challenges for Through Silicon Via (TSV) interconnect in recent years. In this work, copper CMP slurry and process and wafer level thinning with temporary bonding were studied in detail. The concentration of peroxide (H2O2), citric acid, SiO2 particle and Benzotriazole (BTA) in the CMP slurry and their effects were...
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