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A correction to a previously published Q- and bandwidth-enhancing design technique using parasitic cancellation to obtain a high-Q active inductor operating at frequencies above 6 GHz using nonminimal-length CMOS technologies is presented. A measured inductance of 1.9 nH is achieved at 6.75 GHz with a Q of 38 occupying only 0.0026 mm2 silicon chip area. The active inductor is then used to obtain a...
This paper presents the design of a bondwire antenna with detailed equations showing the derivation of the radiated power, radiation pattern, and the transmitter to receiver link-budget for a bondwire-antenna for short-range radio communications in the 6.5 GHz frequency range. The bondwire antenna is then used to design a high-gain, narrowband duplexer-less LNA/PA blocks for a transceiver with the...
This paper presents the design of a bondwire antenna with detailed equations showing the derivation of the radiated power, radiation pattern, and the transmitter to receiver link-budget for a bondwire-antenna for short-range radio communications in the 6.5 GHz frequency range. The bondwire antenna is then used to design a high-gain, narrowband duplexer-less LNA/PA blocks for a transceiver with the...
This paper presents a design procedure used in industry for designing low-power narrowband high-gain CMOS LNAs for wireless applications for frequencies greater than 6 GHz, with considerations for process variations. This paper does not give detailed derivations of equations. Rather, it gives the simulation procedure and methodology that converges quickly to a practical optimized solution for LNA...
This paper presents the design technique and detailed equations of a high frequency, high-Q, active inductor (AI) that can be designed for frequencies above 6 GHz using nonminimal-length CMOS technologies, e.g. 130 nm CMOS, and used for industry because of the bias controls available in the topology. The design is acheived via a parasitic cancellation technique. An inductance of 2.89 nH is acheived...
This paper presents the design technique and detailed equations of a high frequency, high-Q, active inductor (AI) that can be designed for frequencies above 6 GHz using non-minimal-length CMOS technologies, e.g. 130 nm CMOS, and used for industry because of the bias controls available in the topology. The design is achieved via a parasitic cancellation technique. An inductance of 2.89 nH is achieved...
This paper presents a novel way to design an inductor-less low noise amplifier. The LNA created uses an artificial tank (AT) created from a damped ring oscillator (RO) to replace the LC-tank normally used in tuned circuits. The measured results show the LNA has an 18 dB voltage gain, 2.3 dB noise figure, an IP3 of -11 dBm, a 1 dB compression point of -19 dBm, and a power consumption of 4.85 mW. The...
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