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3D stacked systems with on-chip DRAM provide high speed and wide bandwidth for accessing main memory, overcoming the limitations of slow off-chip buses. Power densities and temperatures on the chip, however, increase following the performance improvement. The complex interplay between performance, energy, and temperature on 3D systems with on-chip DRAM can only be addressed using a comprehensive evaluation...
3D multicore systems with stacked DRAM have the potential to boost system performance significantly; however, this performance increase may cause 3D systems to exceed the power budget or create thermal hot spots. This paper introduces a framework to model on-chip DRAM accesses and analyzes performance, power, and temperature tradeoffs of 3D systems. We propose a runtime optimization policy to maximize...
We introduce a tuning space mapping (TSM) technology for microwave design optimization. For the first time, we formulate the novel TSM concept and show how it relates to the standard space mapping methodology. The new method is based on a so-called tuning model that is created using engineering expertise and knowledge of the design problem, but also utilizes the efficiency of space mapping for translating...
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