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We present the highest density demonstration of CMOS technology reported to date featuring a 6T SRAM cell size of 0.021 µm2 (Fig. 1). The motivation for this work was to explore the limits of device patterning and basic module integration at dimensions relevant to the 10 nm node [1]. A trigate device architecture with a minimum contacted gate pitch (CGP) and minimum contacted fin pitch (CFP) of 50...
The resistance of phase-change-memory (PCM) cells measured during RESET programming (dynamic resistance, Rd) is found to be inversely proportional to the amplitude of the programming current, as Rd = [A/I] + B. We show that parameters A and B are related to the intrinsic properties of the memory cell, and demonstrate by means of experimental data that they could be used to characterize the cell-to-cell...
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