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In this paper, we show that it is possible to use built-in-self-test circuitry to correct some errors of the ADC under test. We take the example of the LH-BIST architecture we have previously developed to measure the ADC offset value. The interest of LH-BIST architecture is that one of its registers is directly connected to the output of the convert. Hence, this register can be use to digitally modify...
This paper deals with the remote access to an Integrated Circuits (ICs) Automated Test Equipment (ATE) for both educational and engineering purposes. This experience was initiated in 1998 in the context of a French network (CNFM) in order to provide a distant control to industrial equipment to academic and industrial people. The actual shared resource is a Verigy V93K System-on-Chip (SoC) tester platform...
Simultaneous switching noise (SSN) is an important issue for the design and test and actual ICs. In particular, SSN that originates from the internal logic circuitry becomes a serious problem as the speed and density of the internal circuit increase. In this paper, an on-chip monitor is proposed to detect potential logic errors in digital circuits due to the presence of SSN. This monitor checks the...
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