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Economic viability of on-package, in-situ cooling based on Thin-film Thermoelectric Coolants (TF-TEC) for hot-spot cooling involves myriad challenges necessitating engineering trade-offs. Principal factors include the cost of integration, the net energy consumption of the TEC based system, as well as system-level complexities arising from issues such as mutual thermal conflicts and interdependencies...
On-chip inductive effects are becoming predominant in deep submicron interconnects due to increasing clock speed, circuit complexity and an increase in interconnect length. In this paper, a novel closed form delay metric has been proposed for the on-chip VLSI RLC interconnect. The model has also been extended for the case when the time of flight of the input signal is comparable. It is started with...
In this paper, simple explicit delay and rise time expressions for uniformly distributed RC on-chip interconnect line are derived based on Elmore's approximations. Here, an n-cell RC ladder network with capacitive load is used. Transfer function for the n-cell RC ladder network is obtained by using the transmission line parameter matrix for each cell. In order to deduce the transfer function, the...
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