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This paper demonstrates and experimentally reports the highest ever performance boosting in strained silicon-nanowire homojunction TFETs with negative capacitance, provided by matched PZT capacitors. Outstanding enhancements of Ion, gm, and overdrive are analyzed and explained by most effective reduction of body factor, m < 1, especially for Vg>Vt, which greatly amplify the control on the surface...
In this work, we present our experimental results on Si GAA NW TFET inverters. The ambipolarity of both n- and p-TFETs was successfully suppressed by employing a drain spacer to create an intrinsic Si region between the drain and the gate, the so-called drain-gate underlap. The complementary TFET inverters show a steep transition between high/low states. Compared with the ambipolar TFET inverter,...
In this letter, we present complementary tunneling field-effect transistors (CTFETs) based on strained Si with gate all around nanowire structures on a single chip. The main focus is to suppress the ambipolar behavior of the TFETs with a gate–drain underlap. Detailed device characterization and demonstration of a CTFET inverter show that the ambipolar current is successfully eliminated for both p-...
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