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In order to defend the power analysis attack reversible logic is a good candidate as it ideally does not dissipate any heat and today reversible logic is an emerging research area. In literature different designs for reversible hardware cryptography have been proposed but they have been implemented using complex gate libraries and further theorems have been proposed defining lower limit of implementation...
In this paper, we explore the designs of a circuit-switched router, a wormhole router, a quality-of-service (QoS) supporting virtual channel router and a speculative virtual channel router and accurately evaluate the energy-performance tradeoffs they offer. Power results from the designs placed and routed in a 90-nm CMOS process show that all the architectures dissipate significant idle state power...
The paper presents a novel high speed and low power 15-4 Compressor for high speed and low power multiplication applications. The proposed compressor uses bit sliced adder architecture to exploit the parallelism in the computation of sum of 15 input bits by five full adders. The newly proposed compressor is also centered around the design of a novel 5-3 compressor that attempts to minimize the stage...
We investigate the shared-wavelength WDM-PON architecture which accommodates bursty downstream traffic. Based on the architecture, the proposed flow-scheduling algorithm can support user-specified service level agreements (SLAs), especially under high traffic load. Illustrative results demonstrate that the new architecture can provide a user with a number of streaming flows with bandwidth and maximum...
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