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In the design of next-generation distributed and high-performance computing systems, Reconfigurable Processing Elements (RPEs) such as FPGAs and multi-core heterogeneous computers will play an important role. FPGAs are well-known for their programmability, power efficiency, reasonably high performance, functional flexibility, and their scalability. However, proper virtualization schemes at higher...
The H.264/AVC intra-frame codec is widely used to compress image/video data for applications like Digital Still Camera (DSC), Digital Video Camera (DVC), Television Studio Broadcast, and Surveillance video. Intra-prediction is one of the top 3 compute-intensive processing functions in the H.264/AVC baseline decoder and, therefore, consumes significant number of compute cycles a processor. In this...
Real-time video compression applications such as Digital Video Camera (DVC), Television Studio Broadcast, and Surveillance video utilize the H.264/AVC video encoder in intra-only encoding mode. The H.264/AVC standard supports multiple intra-prediction modes to reduce spatial redundancy in the video frame. The intra-prediction process for a current pixels block requires the reconstructed pixels from...
In this paper, we present a high-throughput, area-efficient, hardware accelerator for the deblocking filter in H.264/AVC video compression standard. In order to achieve this goal, we start with algorithmic optimization and propose a novel decomposition of the filter kernels for the deblocking filter. The proposed decomposition reduces the number of adders by 51% and thereby greatly reduces the area...
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