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The conventional CMOS pins consume very large energy when driving chip pads because of large load capacitances. This paper reports two adiabatic pad cells for driving the chip pads. The proposed adiabatic pad cells include mainly chip pads, electrostatic discharge (ESD) protection circuits, and two stage adiabatic buffers that are used to drive the large load capacitances on chip pads. For comparison,...
The implementations of adiabatic flip-flops and sequential circuits are described in this paper. The flip-flops are realized with the two-phase CPAL (complementary pass-transistor adiabatic logic) circuits. The two-phase non-overlap power-clock generator is used to supply the CPAL sequential circuits, which is realized by using a simple converter and a single-phase sinusoidal power-clock. A power-gating...
This paper presents a content-addressable memory (CAM) based on adiabatic principle. All circuits except for CAM storage cells and driving control circuits for match-lines are realized using CPAL (complementary pass-transistor adiabatic logic) circuits. The CAM storage cell uses the same structure as convention CMOS circuits with four compare transistors. A fully adiabatic scheme for driving match...
This paper presents a novel CAM (content- addressable memory) using CPAL (complementary pass- transistor adiabatic logic) circuits. All circuits except for CAM cells are realized using CPAL circuits. The match-lines are driven using bootstrapped NMOS switches. The charge of large node capacitance on match-lines, bit-lines, word-lines, and address-lines is well recovered in fully adiabatic manner....
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