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Overshoot voltages during VFTLP testing of DTSCRs are investigated. The DTSCRs in a 65 nm process turn on at approximately 500 ps. The overshoot voltages from DTSCRs are shown to cause gate oxide failures when gate oxide monitors were added in parallel to DTSCR ESD devices. Scaling trends show DTSCRs turning on at approximately 150 ps when technologies are scaled down to the 32 nm node.
We present an improved wafer-level VFTLP measurement system. This system produces pulses with sub-150 ps rise time and few distortions at the rising edge. By introducing a broadband power divider, the oscilloscope no longer limits the pulse amplitude, and arbitrarily high pulse voltages can be measured. Turn-on effects in diodes and NMOSFETs are investigated using this system.
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