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Clock skew scheduling is an efficient technique to minimize the cycle period by properly assigning clock delays to registers in a circuit. But its effectiveness is limited by the difficulty in implementing a large number of arbitrary clock skews. Multi-domain clock skew scheduling and prescribed-domain clock skew scheduling are two alternatives to overcome this shortage by restricting the number of...
Clock skew scheduling is an effective technique to improve the performance of sequential circuits. However, with process variations, it becomes more difficult to implement a large number of clock delays in a precise manner. Multi-domain clock skew scheduling is one way to overcome this limitation. In this paper, we prove the NP-completeness of multi-domain clock scheduling problem, and design a practical...
In this paper, we propose a RT level power reduction scheme which can be used for the applications that require ultra-low power consumption. A novel wasting-toggle-rate (WTR) based clock power reduction technique is introduced. It compares the WTR of a stimulus with the pre-computed threshold WTR of the circuit, and clock gating is applied to the circuit only if there is power-saving benefit. It considers...
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