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This paper describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) to be used in the upgrade of the data acquisition electronics of the upgrade of the LHCb calorimeters. in order to shift the phase of the clock (25 ns) in steps of 1ns, with a 55ps jitter and 21.5ps of delay line linearity. The delay lines will be integrated into ICECAL, the LHCb calorimeter...
Two solutions for the analog signal processing of a particle detector, the foreseen upgrade of the LHCb calorimeter, are presented. High precision measurements and low noise are required for a signal transmitted over 12 meter cables that spills over the following clock cycle. One solution, cast in an ASIC, uses an active termination over the cable transmission line and a dual channel integration scheme...
An integrated circuit for the Upgrade of the LHCb Calorimeter front end electronics is presented. The circuit is based on a current mode input stage followed by two fully differential interleaved channels with a switched integrator and a track and hold. The input stage employs a novel electronically cooled input termination scheme to achieve the stringent noise requirements. Compared to previous designs,...
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